OpenVPX™ - Box Level Integration 
OpenVPX Pre-Configured Development Platforms and Systems
   
Description
Model Number

 

 

 

 

OpenVPX logo

Discover our new Target Application Guides!

The first are associated directly with the VPX-300 Platform below. They:

  1. Identify a starting board and its profiles
  2. Identify supporting boards based on profile and function
  3. Determine the backplane topology necessary for application data flow, select a standard profile or design a custom backplane based on a standard profile
  4. Identify an OpenVPX chassis profile

Click here to download these very valuable development guides.

 

No one does OpenVPX system development better than Elma Electronic.

Here are three reasons:

1. Elma's unique position as a designer and manufacturer of VPX and as a valued partner

    to many respected embedded board suppliers ensures our ability to deliver fully

    interoperable, multi-vendor OpenVPX solutions that perform as designed.

2. Elma has over 30 years experience developing some of the most complex integrated

    platforms in the embedded computing industry.

3. Elma is a member and key contributor to the VITA 65 and VITA 46 working groups as

    well as several other OpenVPX specification committees. As a member of both the VPX

    Steering Committee and the Technical Working Group, Elma has played a key role in

    OpenVPX evolution. We know VPX.

Board Products

We offer a broad range of best in class partner and in-house VPX board products

Backplanes

We don’t just manufacture backplanes, we design them. Our staff includes some of the most experienced backplane design engineers in the industry.

Chassis Level Systems

We can bring it all together in a fully integrated chassis ready for application development or deployment.

OpenVPX™ Based Signal Acquisition System
3U VPX Signal Acquisition System - SigPro1 OpenATR

SigPro1 OpenATR Series Signal Processing Platform

The SigPro1 OpenATR box is an OpenVPX™ based signal acquisition system intended for use in signal processing and recording applications such as data acquisition, radar, beamforming, and other high speed signal processing applications.

Based on a Virtex™-6 series FPGA with high performance A/D front end, the system runs on a 2nd generation Intel® Core i7™ processor and includes a two TB storage subsystem with room to expand. For high bandwidth data collection applications, the system can operate in dual channel record and playback mode, with two 16-bit 200 MS/s A/D converters and an 800 MS/s 16-bit D/A converter.

The complete payload is a truly interoperable, multi-vendor OpenVPX platform. The OpenATR is highly configurable, accepting different FPGA cards and firmware. It also runs Pentek’s Talon® series data acquisition and recording system architecture and application software.

  • Passively cooled mini ATR-style box
  • Intel™ Core i7 SBC
  • Virtex™-6 FPGA processor
  • Dual 2½”, SLC or MLC SSD storage
  • A front-end FPGA cluster performs incoming digital signal processing in advance of higher level back end operations
  • Multiple I/O ports brought out via rugged MIL-C-38999 connectors
  • Configurable front-end

Download Datasheet

3U OpenVPX Reference Development Platforms
3U VPX MPC8640 Dual Core Single Board Computer

VPX-300 Reference Development Platform for OpenVPX Systems with Virtex 6 FPGA and GPGPU for High Speed Signal Processing

Models SEFV3PXCNICXNVN and SEFV3PXCNICXNVN-GRA

Architecture reference platform designed to support development of systems targeted for use in compute intensive applications which are implemented by using FPGAs for Front End / Back End processing.

Featuring an Nvidia 240T based GPGPU for high speed graphics, the VPX-300 enables system design in radar signal processing, image processing, and other high bandwidth signal processing in ISR, C4 and persistent surveillance applications.

  • As a proven reference platform, the VPX-300 insures that all VPX boards in the system have been selected and tested for interoperability.
  • Designed around a Virtex-6 FPGA based front-end processor (FEP) card
  • Combining data and control plane topology, the architecture supports multi-processor capability via two clusters for high performance front-end and back-end computing
  • The OpenVPX standard based backplane profile provides two separate star sections which are established through a data and control plane switch, handling both PCIe and Gigabit Ethernet links
  • A front-end FPGA cluster performs incoming digital signal processing in advance of higher level back end operations
  • In addition to high bandwidth FPGA processing, the VPX-300 supports:
    • An NVIDIA 240T graphics processing (GPGPU) unit for high    definition image processing and graphics acceleration.
    • Nvidia’s CUDA parallel computing architecture, which enables dramatic increases in computing performance by harnessing the power of the GPU

Download Datasheet